Cypress Semiconductor /psoc63 /I2S0 /INTR_SET

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Interpret as INTR_SET

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TX_TRIGGER)TX_TRIGGER 0 (TX_NOT_FULL)TX_NOT_FULL 0 (TX_EMPTY)TX_EMPTY 0 (TX_OVERFLOW)TX_OVERFLOW 0 (TX_UNDERFLOW)TX_UNDERFLOW 0 (TX_WD)TX_WD 0 (RX_TRIGGER)RX_TRIGGER 0 (RX_NOT_EMPTY)RX_NOT_EMPTY 0 (RX_FULL)RX_FULL 0 (RX_OVERFLOW)RX_OVERFLOW 0 (RX_UNDERFLOW)RX_UNDERFLOW 0 (RX_WD)RX_WD

Description

Interrupt set register

Fields

TX_TRIGGER

Write with ‘1’ to set corresponding bit in interrupt request register.

TX_NOT_FULL

Write with ‘1’ to set corresponding bit in interrupt request register.

TX_EMPTY

Write with ‘1’ to set corresponding bit in interrupt request register.

TX_OVERFLOW

Write with ‘1’ to set corresponding bit in interrupt request register.

TX_UNDERFLOW

Write with ‘1’ to set corresponding bit in interrupt request register.

TX_WD

Write with ‘1’ to set corresponding bit in interrupt request register.

RX_TRIGGER

Write with ‘1’ to set corresponding bit in interrupt request register.

RX_NOT_EMPTY

Write with ‘1’ to set corresponding bit in interrupt request register.

RX_FULL

Write with ‘1’ to set corresponding bit in interrupt request register.

RX_OVERFLOW

Write with ‘1’ to set corresponding bit in interrupt request register.

RX_UNDERFLOW

Write with ‘1’ to set corresponding bit in interrupt request register.

RX_WD

Write with ‘1’ to set corresponding bit in interrupt request register.

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